Tengfei Jiang is an associate professor in the UCF Department of Materials Science and Engineering and the Advanced Materials Processing and Analysis Center. Her research interests lie in the areas of materials reliability for interconnect and packaging. Jiang's work combines metrology, materials characterization, fabrication, and modeling to tackle critical reliability challenges in advanced microelectronics systems. She received her doctoral degree from University of Texas-Austin in 2015 and her master's degree from Ohio State University in 2009, both in materials science and engineering. She received the NSF CAREER award in 2022.

• Jiang, L. Spinella, J. Im, R. Huang, P. S. Ho, “Processing Effect on Via Extrusion for TSVs in Three-Dimensional Interconnects: A Comparative Study”, IEEE Trans. on Device and Materials Reliability, 16 (4), pp. 465-469 (2016).


• Chen, C. Dejoie, T. Jiang, C.-S. Ku and N. Tamura, “Quantitative Microstructural Imaging by Scanning Laue X-Ray Micro- and Nanodiffraction”, MRS Bulletin, 42 (6), pp. 445-453 (2016) (invited review paper).


• Cho, F. Shafiei, B.S. Mendoza, M. Lei, T. Jiang, P. S. Ho, and M. C. Downer, “Second-harmonic Microscopy of Strain Fields around Through-Silicon-Vias”, Appl. Phys. Lett., 108, 151602 (2016).


• Hao, L. Wang, Y. Liu, H. Chen, X. Wang, C. Tan, S. Nie, J. W. Suk, T. Jiang, T. Liang, J. Xiao, W. Ye, C. R. Dean, B. I. Yakobson, K.F. McCarty, P. Kim, J. Hone, L. Colombo, and R.S. Ruoff, “Oxygen-Activated Growth and Bandgap Tunability of Large Single-Crystal Bilayer Graphene”, Nature Nanotechnology, 11, pp. 426–431 (2016).


• Jiang, C. Wu, J. Im, R. Huang, P. S. Ho, “Impact of Grain Structure and Material Properties on Via Extrusion in 3-D Interconnects”, Journal of Microelectronics and Electronic Packaging, 12, pp. 118-122 (2015).


• Jiang, J. Im, R. Huang, and P.S. Ho, “TSV Stress Characteristics and Reliability Impact for 3D Integrated Circuits”, MRS Bulletin, 40 (3), pp 248 – 256 (2015) (invited review paper).


• Jiang, C. Wu, N. Tamura, M. Kunz, B. G. Kim, H-Y. Son, M.-S. Suh, J. Im, R. Huang, and P. S. Ho, “Study of Stresses and Plasticity in Through-Silicon Via Structures for 3D Interconnects by X-Ray Micro-Beam Diffraction”, IEEE Trans. on Device and Materials Reliability, 14(2), pp. 698-703 (2014).


• S.K. Ryu, T. Jiang, J. Im, R. Huang, and P.S. Ho, “Thermomechanical Failure Analysis of Through-Silicon Via Interface Using a Shear-Lag Model With Cohesive Zone”, IEEE Trans. on Device and Materials Reliability, 14(1), pp.318-326 (2014).


• Jiang, C. Wu, L. Spinella, J. Im, N. Tamura, M. Kunz, H-Y. Son, B. G. Kim, R. Huang, and P.S. Ho, “Plasticity Mechanism For Copper Extrusion In Through-Silicon Vias for Three-Dimensional Interconnects”, Appl. Phys. Lett., 103, 211906 (2013).


• Jiang, S.K. Ryu, Q. Zhao, J. Im, R. Huang, and P.S. Ho, “Measurement and Analysis of Thermal Stresses in 3D Integrated Structures Containing Through-Silicon-Vias”, Microelectron Reliab., 53, pp. 53-62 (2013).


• S.K. Ryu, K.H. Lu, T. Jiang, J. Im, R. Huang, and P.S. Ho, “Effect of Thermal Stresses on Carrier Mobility and Keep-out Zone around Through-Silicon Vias for 3-D Integration”, IEEE Trans. on Device and Materials Reliability, 12, 255-262 (2012).


• S.K. Ryu, T. Jiang, K.H. Lu, J. Im, H.-Y. Son, K.-Y. Byun, R. Huang, and P.S. Ho, “Characterization of Thermal Stresses in Through-Silicon Vias for Three-Dimensional Interconnects by Bending Beam Technique”, Appl. Phys. Lett., 100, 041901 (2012).