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Biography

Forthcoming

Recent Publications

  • D. Kim*, M. Chaudhuri*, M. Heinrich, and E. Speight. Architectural Support for Uniprocessor and Multiprocessor Active Memory Systems. IEEE Transactions on Computers, 53(3):288-307, March 2004.
  • M. Chaudhuri* and M. Heinrich. SMTp: An Architecture for Next-generation Scalable Multithreading. In Proceedings of the 31st International Symposium on Computer Architecture (ISCA), pages 124–135, June 2004.
  • J. Gibson, R. Kunz, D. Ofelt, M. Horowitz, J. Hennessy, and M. Heinrich. FLASH vs. (Simulated) FLASH: Closing the Simulation Loop. In Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 49–58, November 2000.
  • M. Heinrich et al. The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor. In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pages 274–285, 1994.
  • J. Kuskin, D. Ofelt, M. Heinrich, et al. The Stanford FLASH Multiprocessor. In Proceedings of the 21st International Symposium on Computer Architecture (ISCA), pages 302–313, April 1994.

Education

  • Stanford University Electrical Engineering (Ph.D.)
  • Stanford University Electrical Engineering (M.S.)
  • Duke University Electrical Engineering, Computer Science (Double Major) (B.S.)

Specialties

Parallel Computer Architecture, GPGPU architecture, energy-efficient computing, coherent memory systems

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